The present invention relates to an RF (Radio Frequency) power amplifier device and an operating method thereof, and in particular to a technology useful in reducing current consumption at low power output and lightening an increase in mounting area.
A plurality of communication systems exist in mobile communications typified by portable phones. There is known in Europe, for example, W-CDMA corresponding to the wireless communication system for 3rd generation started with service in recent years, in addition to a GSM prevalent as the wireless communication system for 2nd generation and EDGE improved in data communication rate of the GSM. Cdmalx corresponding to the wireless communication system for 3rd generation is in widespread use in North America in addition to a DCS and a PCS each corresponding to the wireless communication system for 2nd generation.
Incidentally, GSM is an abbreviation of Global System for Mobile Communications. EDGE is an abbreviation of Enhanced Data rates for GSM Evolution. W-CDMA is an abbreviation of Wide band Code Division Multiple Access. DCS is an abbreviation of Digital Cellular System. PCS is an abbreviation of Personal Communications Services. cdmalx is an abbreviation of Code Division Multiple Access lx.
The operation of a high frequency power amplifier included in a portable phone terminal is specified to a saturation operation in the case of GSM in a basic mode, which uses only phase modulation, and specified to a linear operation at an operating point where a backoff of a few dB is taken from the saturation operating point of GSM, in the case of EDGE using even amplitude modulation along with phase modulation. Even in the case of W-CDMA and cdma-lx using even amplitude modulation along with phase modulation, the operation of a high frequency power amplifier is specified to a linear operation.
While there is a need to extend the maximum talking time for the purpose of improving the convenience of the portable phone terminal, a reduction in current consumed or used up during talking on the portable phone terminal is required. Since a part relatively large in proportion occupied within all current consumption in particular is of an RF power amplifier of a transmission section, a reduction in the current consumption of the RF power amplifier of the transmission section is effective in reducing the current consumption of the portable phone terminal.
Reducing current consumed on average is required under actual use environments of the portable phone terminal in particular. This current is hereinafter called “average current consumption”.
With a size reduction in the recent portable phone terminal, the RF power amplifier of the transmission section needs to be reduced in size.
Various methods have been reported for the achievement of miniaturization. As one example, there is a method disclosed in each of the following patent documents 1 through 4.
For example, a power amplifier described in the following patent document 1 is configured by an RF signal input terminal, an RF output terminal, a power supply voltage source input terminal, and a bias input terminal. An RF signal is inputted from the RF signal input terminal and amplified. The amplified RF signal is outputted from the RF output terminal and transmitted from an antenna through a matching circuit.
A power supply voltage is inputted from a DC-DC converter to the power supply voltage source input terminal. In one embodiment, the DC-DC converter is a buck converter also called a step-down circuit. In another embodiment, the DC-DC converter is a boost converter called a step-up circuit. In a further embodiment, the DC-DC converter is a buck/boost converter having both functions of step-up and step-down. The DC-DC converter converts a battery voltage or a supply voltage from a battery or another power supply to a power supply voltage used in the power amplifier.
A control circuit is equipped with a schottky diode or a normal diode, which thereby detects an amplification output signal and outputs a signal corresponding to an output power intensity. That is, two signals responsive to the output power intensity are generated by the control circuit. The first signal is supplied to the DC-DC converter, and the second signal is supplied to a bias circuit.
Since the DC-DC converter changes in voltage transformation ratio due to the first signal supplied thereto, the power supply voltage changes. When a low amplification output signal is detected by the control circuit, the DC-DC generates a low power supply voltage in accordance with the first signal generated by the control circuit. Thus, since power consumption of the power amplifier decreases, high power efficiency can be achieved.
Simultaneously with the control of the DC-DC converter, a bias voltage set signal supplied to the bias input terminal changes due to the second signal supplied to the bias circuit. Since the bias voltage is lowered in the case of the low amplification output signal, current consumption from the battery can be reduced. There is a linear correlation between the input bias voltage and the bias voltage. The input bias voltage is converted to a desired value to achieve the maximum efficiency, using a suitable circuit, for example.
A power amplifier described in the following patent document 2 is comprised of a first transistor and a second transistor coupled in parallel. A static characteristic being preferably a pinchoff voltage, of the first transistor is different from that of the second transistor.
An RF signal is inputted from an RF signal input terminal to the first and second transistors, and a bias voltage is inputted from a bias voltage input terminal. The RF signal amplified by the first and second transistors is outputted from an RF signal output terminal. The source of an FET (Field Effect Transistor) that configures each of the first and second transistors is coupled to a ground potential, and a fixed drain voltage is supplied from a drain voltage input terminal.
The first transistor and the second transistor are different from each other in pinchoff voltage. The pinchoff voltage of the second transistor is a voltage higher than the pinchoff voltage of the first transistor. Therefore, when a relatively high voltage is applied to the bias voltage input terminal, the first transistor and the second transistor are turned on, whereas when an intermediate voltage is applied, only the first transistor is turned on.
Thus, the size of the second transistor having the high pinchoff voltage is set large to maintain output power at high output. Further, the size of the first transistor having the low pinchoff voltage is set small to enable an improvement in the efficiency at low output.
A power amplifier described in the following patent document 3 is equipped with an input impedance matching unit, an intermediate stage impedance matching unit, a low output amplifier, a high output amplifier, an output impedance matching unit, an amplifier control unit, and a dynamic voltage supply unit. The high output amplifier corresponding to a high linear amplifier has the function of operating in a high output mode in the maximum power consumption region by control of the amplifier control unit and amplifying a signal given from the intermediate stage impedance matching unit.
The low output amplifier corresponding to a non-linear amplifier has the function of operating in a low output mode in the maximum frequency-of-use region by control of the amplifier control unit, providing parallel coupling to the high output amplifier and amplifying a signal given from the intermediate stage impedance matching unit.
The low output amplifier is of an amplifier of Class E operation, for example, to obtain a high efficiency characteristic, which is comprised of a bias unit coupled to an output stage of the amplifier control unit and for on/off-controlling the low output amplifier, a first transistor driven by a control signal of the amplifier control unit, and a Class E load which is coupled between the collector of the first transistor and an input stage of the output impedance matching unit and causes the output impedance matching unit to input an RF signal.
The amplifier control unit generates a predetermined power control signal, based on an antenna output signal given from outside. During a high output mode operation, the amplifier control unit turns off the low output amplifier to control the low output amplifier in such a manner as not to be driven and turns on only the high output amplifier to control the high output amplifier in such a manner as to be driven. On the other hand, during a low output mode operation, the amplifier control unit turns off the high output amplifier and turns on only the low output amplifier to control the low output amplifier in such a manner as to be driven. Thus, according to the power amplifier described in the following patent document 3, a power stage of the power amplifier is divided into one or more. At low output, a non-linear amplifier is used for achieving high efficiency and a high linear amplifier is used for an improvement in linearity at high output, thereby supplying a variable power supply voltage from the dynamic voltage supply unit to the non-linear amplifier for the purpose of maximizing power efficiency at the maximum frequency of use. There are thus advantages that efficiency in the region of the maximum frequency of use can be increased and the battery runtime can be prolonged.
An RF power amplifier described in the following patent document 4 includes a first amplifying device and a second amplifying device used as final stage amplifying devices coupled in parallel between an input terminal and an output terminal. The first amplifying device is operated in any of Class B to Class AB, and the second amplifying device is operated in Class C. A first execution device size of the first amplifying device is set smaller than a second execution device size of the second amplifying device.
At low output power, the second amplifying device large in device size in a Class C operation is deactivated, and the first amplifying device small in device size in one of Class B and Class AB amplifies an RF input power signal. It is therefore possible to improve power application efficiency at the low output power. At high output power, the second amplifying device as well as the first amplifying device amplifies an RF input power signal. Since the second amplifying device is large in device size, power application efficiency at the high output power can be improved.
Further, an RF power amplifier according to another embodiment described in the following patent document 4 includes a DC-DC converter controlled by an output control signal in order to use a high power supply voltage at high output power and use a low power supply voltage at low output power. A DC output voltage of the DC-DC converter is supplied to the drains or collectors of first and second amplifiers coupled in parallel between an input terminal and an output terminal via a first power supply voltage supply circuit and a second power supply voltage supply circuit.
On the other hand, a distribution of transmission power of a portable phone of a W-CDMA system is shown in FIG. 4.1 in page 22 of the following non-patent document 1. It is understood from this figure that a maximum usage probability of 12 to 13% is obtained at an intermediate output power of −6 to 0 dBm, and that a usage probability is also reduced to 10% or less in proportion to a reduction in output power at a low output power of −10 dBm or less, whereas at a high output power of 3 dBm or more, a usage probability is also reduced to 10% or less in inverse proportion to an increase in output power.